Getting Started with RS08, Rev. 1

Introduction to RS08

Freescale Semiconductor

2

1.1

RS08 Architecture

The RS08 platform is developed for extremely low cost applications. Its hardware size is optimized and

the overall system cost is reduced. The smaller hardware size allows the silicon to fit into a smaller

package, such as the 6-pin dual flat no lead package (DFN). The RS08 platform retains a similar

programming model as in the popular HC08/S08 platforms to allow easy source code migration between

the platforms.

The main features of the RS08 platform are:

•

Subset of S08 instruction set

•

New instructions for shadow program counter (SPC) — SHA and SLA

•

New tiny and short addressing modes for code size optimization

•

Maximum 16K-byte accessible memory space

•

Eliminated vector fetch mechanism for interrupt and reset service

•

Eliminated RAM stacking mechanism for subroutine call

•

Single level hardware stacking for subroutine call

•

Low power mode supported through the execution of STOP and WAIT instructions

•

Stop wakeup through internal or external interrupt trigger

•

Illegal address and opcode detection with reset

•

Hardware security feature to protect unauthorized access to the non-volatile memory (NVM) area

•

Debug and NVM program/erase support using single pin interface

1.1.1

CPU Registers

The RS08 CPU registers include an 8-bit general purpose accumulator (A), 14-bit program counter (PC),

14-bit shadow program counter (SPC), and a 2-bit conditional code register (CCR). The CCR contains two

status flags and are tested for conditional branch instructions such as BCS and BEQ. Figure 1-1 shows the

RS08 CPU registers.

Figure 1-1. RS08 CPU Registers

PC

SPC

CARRY

ZERO

0

0

0

7

13

13

ACCUMULATOR

A

SHADOW PROGRAM COUNTER

7

PROGRAM COUNTER

CCR

C

Z

CONDITION CODE REGISTER