Introduction to RS08

Getting Started with RS08, Rev. 1

Freescale Semiconductor

13

1.2.1

Tiny and Short Addressing Mode Instructions

Tiny and short addressing mode instructions are single byte instructions. Maximizing the use of these

instructions can efficiently improve the overall code density. Given the limited addressable space for these

instructions, careful planning to allocate the most frequently used variables to be located within the tiny

and short addressable area is recommended. Table 1-3 summarizes the tiny and short instructions support

for the RS08 platform.

Push X (Index Register Low) onto

Stack

PSHX

Push (X); SP

← (SP) – $0001

Pull Accumulator from Stack

PULA

SP

← (SP + $0001); Pull (A)

Pull H (Index Register High) from

Stack

PULH

SP

← (SP + $0001); Pull (H)

Pull X (Index Register Low) from

Stack

PULX

SP

← (SP + $0001); Pull (X)

Reset Stack Pointer

RSP

SP

← $FF

Return from Interrupt

RTI

SP

← (SP) + $0001; Pull (CCR)

SP

← (SP) + $0001; Pull (A)

SP

← (SP) + $0001; Pull (X)

SP

← (SP) + $0001; Pull (PCH)

SP

← (SP) + $0001; Pull (PCL)

Swap Shadow PC High with A

SHA

A

⇔ SPCH

Swap Shadow PC Low with A

SLA

A

⇔ SPCL

Set Carry Bit

SEC

SEC

C

← 1

Set Interrupt Mask Bit

SEI

I

← 1

Enable IRQ pin; Stop Osc.

STOP

STOP

Stop Oscillator

I bit

← 0 for S08 only;

Software Interrupt

SWI

PC

← (PC) + $0001; Push (PCL)

SP

← (SP) – $0001; Push (PCH)

SP

← (SP) – $0001; Push (X)

SP

← (SP) – $0001; Push (A)

SP

← (SP) – $0001; Push (CCR)

SP

← (SP) – $0001; I ← 1

PCH

← Interrupt Vector High Byte

PCL

← Interrupt Vector Low Byte

Enable Interrupts; Stop Processor WAIT

WAIT

I bit

← 0 for S08 only;

NOTES:

1 This is pseudo-instruction, the CPU cycle count and the instruction byte count may not be the same as the S08 equivalent

instruction.

2 This emulated operation do not have an equivalent operation in S08 instruction set.

Table 1-2. RS08 and S08 Instruction Set Comparison (continued)

Description

RS08

S08

Operation