M58LR128KB datasheet(41/110 Pages) NUMONYX

Part #	M58LR128KB

Description	128 or 256 Mbit (횞16, multiple bank, multilevel interface, burst) 1.8 V supply Flash memories

PDF	110 Pages

Scroll/Zoom	100%

Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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41 / 110 page

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

Configuration Register

41/111

Table 12.

Configuration Register

Bit

Description

Value

Description

CR15

Read select

Synchronous read

Asynchronous Read (default at power-on)

CR14

Reserved

CR13-CR11

X latency

010

2 clock latency(1)

The combination X latency=2, data held for two clock cycles and Wait active one data cycle before the

WAIT state is not supported.

011

3 clock latency

100

4 clock latency

101

5 clock latency

110

6 clock latency

111

7 clock latency (default)

Other configurations reserved

CR10

Wait polarity

WAIT is active Low

WAIT is active High (default)

CR9

Data output configuration

Data held for one clock cycle

Data held for two clock cycles (default)(1)

CR8

Wait configuration

WAIT is active during WAIT state

WAIT is active one data cycle before WAIT

state(1) (default)

CR7

Burst type

0Reserved

Sequential (default)

CR6

Valid Clock edge

Falling Clock edge

Rising Clock edge (default)

CR5-CR4

Reserved

CR3

Wrap burst

0Wrap

No wrap (default)

CR2-CR0

Burst Length

001

4 words

010

8 words

011

16 words

111

Continuous (default)

M58LR128KB Datasheet(PDF) 41 Page - Numonyx B.V

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