M58LR128KB datasheet(88/110 Pages) NUMONYX

88 / 110 page

Common Flash interface

M58LR128KT, M58LR128KB, M58LR256KT, M58LR256KB

88/111

(P+30)h = 13Ah

01h

(P+30)h = 13Ah

01h

Bank Region 1 (Erase Block Type 1): BIts per

cell, internal ECC

Bits 0-3: bits per cell in erase region

Bit 4: reserved for “internal ECC used”

BIts 5-7: reserved

(P+31)h = 13Bh

03h

(P+31)h = 13Bh

03h

Bank Region 1 (Erase Block Type 1): Page

mode and Synchronous mode capabilities

Bit 0: Page-mode reads permitted(5)

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

(P+32)h = 13Ch

06h(3)

0Eh(4)

Bank Region 1 Erase Block Type 2 Information

Bits 0-15: n+1 = number of identical-sized

erase blocks

Bits 16-31: n×256 = number of bytes in erase

block region

(P+33)h = 13Dh

00h

(P+34)h = 13Eh

00h

(P+35)h = 13Fh

02h

(P+36)h = 140h

64h

Bank Region 1 (Erase Block Type 2)

Minimum block erase cycles × 1000

(P+37)h = 141h

00h

(P+38)h = 142h

01h

Bank Regions 1 (Erase Block Type 2): BIts per

cell, internal ECC

Bits 0-3: bits per cell in erase region

Bit 4: reserved for “internal ECC used”

BIts 5-7: reserved

(P+39)h = 143h

03h

Bank Region 1 (Erase Block Type 2): Page

mode and Synchronous mode capabilities

Bit 0: Page-mode reads permitted

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

The variable P is a pointer that is defined at CFI offset 015h.

Bank Regions. There are two Bank Regions, see Table 31, Table 34, Table 37 and Table 40.

Applies to M58LR128KT/B only.

Applies to M58LR256KT/B only.

Although the device supports Page Read mode, this is not described in the datasheet as its use is not

advantageous in a multiplexed device.

Table 50.

Bank and erase block region 1 information (continued)

Flash memory (top)

Flash memory (bottom)

Description

Offset(1)

Data

Offset(1)

Data

M58LR128KB Datasheet(PDF) 88 Page - Numonyx B.V

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