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APEX20KC Datasheet(PDF) 52 Page - Altera Corporation |
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APEX20KC Datasheet(HTML) 52 Page - Altera Corporation |
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52 / 90 page ![]() 52 Altera Corporation APEX 20KC Programmable Logic Device Data Sheet The APEX 20KC device instruction register length is 10 bits. The APEX 20KC device USERCODE register length is 32 bits. Tables 14 and 15 show the boundary-scan register length and device IDCODE information for APEX 20KC devices. Notes to Table 15: (1) The most significant bit (MSB) is on the left. (2) The IDCODE’s least significant bit (LSB) is always 1. Figure 30 shows the timing requirements for the JTAG signals. Table 14. APEX 20KC Boundary-Scan Register Length Device Boundary-Scan Register Length EP20K200C 1,164 EP20K400C 1,506 EP20K600C 1,806 EP20K1000C 2,190 Table 15. 32-Bit APEX 20KC Device IDCODE Device IDCODE (32 Bits) (1) Version (4 Bits) Part Number (16 Bits) Manufacturer Identity (11 Bits) 1 (1 Bit) (2) EP20K200C 0000 1000 0010 0000 0000 000 0110 1110 1 EP20K400C 0000 1000 0100 0000 0000 000 0110 1110 1 EP20K600C 0000 1000 0110 0000 0000 000 0110 1110 1 EP20K1000C 0000 1001 0000 0000 0000 000 0110 1110 1 |
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