PCF85263ATLSLASHAX datasheet(49/92 Pages) NXP

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NXP Semiconductors

PCF85263A

Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus

Remark: Clock output is the default state. To save power, it is recommended to disable

the clock when not being used. If no clock is required, then set COF[2:0] in the Function

then set the INTA pin to either INTA data or battery mode.

7.12.6.3 INTAPM[1:0]: battery mode indication

It is possible to output the state of the power switch on the INTA pin. The output has an

open-drain output. The output is available during VDD and VBAT operation.

Power supply

INTA pin state

VDD

INTA = Hi-Z

VBAT

INTA = logic 0

Table 49. INTA battery mode

7.13 Function register

Bit

Symbol

100TH

PI[1:0]

RTCM

STOPM

COF[2:0]

Section

Section 7.13.1

Section 7.13.2

Section 7.13.3

Section 7.13.4

Section 7.13.5

Table 50. Function - chip function control register (address 28h) bit description

7.13.1 100TH: 100th seconds mode

Bit

Symbol

Value

Description

100th second mode

0 [1]

100th second disabled

100TH

100th second enabled

Table 51. 100TH bit - Function control register (address 28h)

[1]

Default value.

The PCF85263A can be configured to count at a resolution of 1 second or 0.01 seconds.

In 100th mode, the 100th_seconds register becomes available and the RTC counts at a

resolution of 0.01 seconds.

The 256 Hz clock signal is divided by 3 for fourteen 100 Hz periods and then by 2 for

eleven 100 Hz periods. This produces an effective division ratio of 2.56 with a maximum

jitter of 3.91 ms. Over twenty-five 100 Hz cycles the jitter is 0 ns.

7.13.2 PI[1:0]: Periodic interrupt

Bit

Symbol

Value

Description

periodic interrupt

00 [1]

no periodic interrupt

once per second

6 to 5

PI[1:0]

once per minute

Table 52. PI[1:0] bits - Function control register (address 28h)

PCF85263A

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Product data sheet

Rev. 5 — 1 February 2021

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PCF85263ATL/AX Datasheet(PDF) 49 Page - NXP Semiconductors

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