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HT47C20 Datasheet(PDF) 9 Page - Holtek Semiconductor Inc |
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HT47C20 Datasheet(HTML) 9 Page - Holtek Semiconductor Inc |
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9 / 46 page ![]() HT47C20 Rev. 1.60 9 July 26, 2002 Program memory - ROM The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 2048 ´16 bits, addressed by the program counter and ta- ble pointer. Certain locations in the program memory are reserved for special usage · Location 000H This area is reserved for the initialization program. Af- ter chip reset, the program always begins execution at location 000H. · Location 004H This area is reserved for the external interrupt service program. If the INT input pin is activated, and the inter- rupt is enabled and the stack is not full, the program begins execution at location 004H. · Location 008H This area is reserved for the time base interrupt service program. If time base interrupt results from a time base overflow, and if the interrupt is enabled and the stack is not full, the program begins execution at location 008H. · Location 00CH This area is reserved for the real time clock interrupt service program. If a real time clock interrupt results from a real time clock overflow, and if the interrupt is enabled and the stack is not full, the program begins execution at location 00CH. · Location 010H This area is reserved for the timer/event counter inter- rupt service program. If a timer interrupt results from a Timer/Event Counter A or B overflow, and if the inter- rupt is enabled and the stack is not full, the program begins execution at location 010H. · Table location Any location in the ROM space can be used as look up tables. The instructions TABRDC [m] (the current page, 1 page=256 words) and TABRDL [m] (the last page) transfer the contents of the lower-order byte to the specified data memory, and the higher-order byte to TBLH (08H). Only the destination of the lower-order byte in the table is well-defined, the higher-order byte of the table word are transferred to the TBLH. The ta- ble higher-order byte register (TBLH) is read only. The table pointer (TBLP) is a read/write register (07H), which indicates the table location. Before accessing the table, the location must be placed in TBLP. The TBLH is read only and cannot be restored. If the main routine and the ISR (Interrupt Service Routine) both employ the table read instruction, the contents of the TBLH in the main routine are likely to be changed by the table read instruction used in the ISR. Errors can occur. In other words, using the table read instruction in the main routine and the ISR simultaneously should be avoided. However, if the table read instruction has to be applied in both the main routine and the ISR, the interrupt is supposed to be disabled prior to the table read instruction. It will not be enabled until the TBLH has been backed up. All table related instructions need two cycles to complete the operation. These ar- eas may function as normal program memory depend- ing upon the requirements. 0 0 0 H 0 0 4 H 0 0 8 H D e v i c e i n i t i a l i z a t i o n p r o g r a m E x t e r n a l i n t e r r u p t s u b r o u t i n e P r o g r a m R O M 1 6 b i t s L o o k - u p t a b l e ( 2 5 6 w o r d s ) 7 . . H N o t e : n r a n g e s f r o m 0 t o 7 0 0 C H T i m e b a s e i n t e r r u p t s u b r o u t i n e R T C i n t e r r u p t s u b r o u t i n e L o o k - u p t a b l e ( 2 5 6 w o r d s ) n 0 0 H n . . H T i m e r / e v e n t c o u n t e r i n t e r r u p t s u b r o u t i n e 0 1 0 H Program memory Instruction(s) Table Location *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table location Note: *10~*0: Table location bits @7~@0: Table pointer bits P10 ~P8: Current program counter bits |
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