Lock to Reference

Power Down Mode

PRBS Verification

TLK2541

Table 5. Receive Status Signals

RXD[16]

RXD[17]

DECODED 20 BIT OUTPUT FULL RATE WITH 8B/10B CODING

0

0

Valid data on RXD[0:7],

Valid data RXD[8:15]

0

1

Valid data on RXD[0:7],

K code on RXD[8:15]

1

0

K code on RXD[0:7],

Valid data on RXD[8:15]

1

1

K code on RXD[0:7],

K code on RXD[8:15]

RXD[16]

DECODED 20 BIT OUTPUT HALF RATE WITH 8B/10B CODING

0

Valid data on RXD[0:7]

1

K code on RXD[0:7]

Table 6. Valid K Characters

RECEIVE DATA BUS

K CHARACTER

(RXD[0:7]) OR (RXD[8:15])

K28.0

000 11100

001 11100

K28.2

010 111000

K28.3

011 111000

K28.4

100 11100

101 11100

K28.6

110 111001

111 11100

K23.7

111 101111

K27.7

111 110111

K29.7

111 111011

K30.7

111 111101

(1)

Should only be present on RXD[7–0] when in running disparity < 0.

When the LCKREFN pin is asserted (active low), the tracking circuitry on the receiver Clock/Data Recovery

(CDR) circuit is disabled, and the recovered byte clock becomes a buffered version of REFCLK. If there is not a

valid serial data stream while the receiver is attempting to lock onto and track a serial data stream, then it is

possible for the recovered byte clock to drift to a frequency above or below the desired data rate by as much as

2000 ppm depending on noise components of the invalid input serial data stream. The assertion of LCKREFN,

while there is no valid incoming serial data, would ensure that the recovered byte clock does not drift away from

REFCLK. The use of LCKREFN is not required to help the receiver lock onto incoming serial data, and the use of

LCKREFN does not speed the process of locking onto data once LCKREFN is released.

When the reference clock (REFCLK) is held static, the TLK2541 goes into power-down mode. In power-down

mode, the serial transmit pins (TXN and TXP) , and the receive data bus pins (RXD[0:19]) go into a

high-impedance state. When the reference clock begins to toggle at a rate approaching its minimum

recommended operating frequency then the TLK2541 will go through its power-on reset procedure.

The TLK2541 also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can check

for errors and report the errors by forcing the PRBSPASS terminal low.

Copyright © 2008, Texas Instruments Incorporated

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