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34063 Datasheet(PDF) 2 Page - Estek Electronics Co. Ltd

Part # 34063
Description  Operation from 3.0 V to 40 V Input
PDF  7 Pages
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Manufacturer  ESTEK [Estek Electronics Co. Ltd]
Direct Link  http://www.estek.com.cn/en/index.asp
Logo ESTEK - Estek Electronics Co. Ltd

34063 Datasheet(HTML) 2 Page - Estek Electronics Co. Ltd

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34063
Absolute Maximum Ratings
Symbol
Parameter
Maximum
Units
VCC
Power Supply Voltage
40
Vdc
VIR
Comparator Input Voltage Range
-0.3 to +40
Vdc
VC(switch)
Switch Collector Voltage
40
Vdc
VE(switch)
Switch Emitter Voltage (VPIN1 = 40 V)
40
Vdc
VCE(switch)
Switch Collector to Emitter Voltage
40
Vdc
VC(driver)
Driver Collector Voltage
40
Vdc
IC(driver)
Driver Collector Current (Note 1)
100
mA
ISW
Switch Current
1.5
A
TJ
Operating Junction Temperature
+150
°C
TA
Operating Ambient Temperature Range
0 to +70
°C
Tstg
Storage Temperature Range
-65 to +150
°C
Electrical Characteristics
(Vcc=5.0V, Ta=Tlow
to Thigh , unless otherwise
specified)
OSCILLATOR
Characteristics
Symbol
Min
Typ
Max
Units
Frequency (Vpin5 = 0V, CT = 1.0 nF, TA = 25°C)
fOSC
24
33
42
kHz
Charge Current(VCC = 5.0V to 40V, TA = 25°C)
Ichg
24
35
42
µA
Discharge Current (VCC = 5.0V to 40V, TA = 25°C)
Idischg
140
220
260
µA
Discharge to Charge Current Ratio (Pin 7 to V CC, TA = 25°C)
Idischg /
Ichg
5.2
6.5
7.5
–
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C)
Vipk(sence)
250
300
350
mV
OUTPUT SWITCH (NOTE 2)
Saturation Voltage, Darlington Connection (ISW = 1.0 A, Pins 1, 8 connected)
VCE(sat)
–
1.0
1.3
V
Saturation Voltage, Darlington Connection (ISW = 1.0 A, Rpin 8 = 82Ω to VCC , Forced β ≅ 20)
VCE(sat)
–
0.45
0.7
V
DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C)
hFE
50
75
–
–
Collector Off-State Current (VCE = 40 V)
IC(off)
–
40
100
µA
COMPARATOR
Threshold Voltage
(TA=25°C)
(TA =Tlow to Thigh)
Vth
1.225
1.21
1.25
–
1.275
1.29
V
Threshold Voltage Line Regulation
(Vcc=3.0 V to 40 V)
Input Bias Current
(Vin=0 V)
TOTAL DEVICE
Supply Current
(Vcc = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, Vpin 5 > Vth, Pin 2 =
Gnd, remaining pins open)
Regline
–
1.4
5.0
mV
IIB
–
-20
-400
nA
ICC
–
–
4.0
mA
NOTES :
1.Maximum package power dissipation limits must be observed.
2.Low duty cycle pulse techniques are used during test to maintain junction temperature
as close to ambient temperature as possible
BEIJING ESTEK ELECTRONICS CO.,LTD
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