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LAN9312 Datasheet(PDF) 294 Page - SMSC Corporation

Part # LAN9312
Description  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
PDF  458 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9312 Datasheet(HTML) 294 Page - SMSC Corporation

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.2 (04-08-08)
294
SMSC LAN9312
DATASHEET
14.4.2.5
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
This read/write register contains the advertised ability of the Port x PHY and is used in the Auto-
Negotiation process with the link partner.
Note:
This register is re-written by the EEPROM Loader following the release of reset or a RELOAD
command. Refer to Section 10.2.4, "EEPROM Loader," on page 149 for additional information.
Index (decimal):
4
Size:
16 bits
BITS
DESCRIPTION
TYPE
DEFAULT
15
Next Page
This bit determines the advertised next page capability. The LAN9312 is not
next page capable. Therefore, this bit must always be 0.
0: PHY does not advertise next page capability
1: PHY advertises next page capability
R/W
0b
14
RESERVED
RO
-
13
Remote Fault
This bit determines if remote fault indication will be advertised to the link
partner.
0: Remote fault indication not advertised
1: Remote fault indication advertised
R/W
0b
12
RESERVED
Note:
This bit should be written as 0.
R/W
0b
11
Asymmetric Pause
This bit determines the advertised asymmetric pause capability.
0: No Asymmetric PAUSE toward link partner advertised
1: Asymmetric PAUSE toward link partner advertised
R/W
0b
Note 14.53
10
Symmetric Pause
This bit determines the advertised symmetric pause capability.
0: No Symmetric PAUSE toward link partner advertised
1: Symmetric PAUSE toward link partner advertised
R/W
Note 14.53
Note 14.54
9
100BASE-T4
This bit determines the advertised 100BASE-T4 capability. The LAN9312
does not support T4 capability. Therefore, this bit must always be 0.
0: 100BASE-T4 ability not advertised
1: 100BASE-T4 ability advertised
R/W
0b
8
100BASE-X Full Duplex
This bit determines the advertised 100BASE-X full duplex capability.
0: 100BASE-X full duplex ability not advertised
1: 100BASE-X full duplex ability advertised
R/W
1b
7
100BASE-X Half Duplex
This bit determines the advertised 100BASE-X half duplex capability.
0: 100BASE-X half duplex ability not advertised
1: 100BASE-X half duplex ability advertised
R/W
1b



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