Hi-Speed USB Transceiver with 1.8V ULPI Interface - 13MHz Reference Clock

Revision 1.3 (11-02-07)

8

SMSC USB3319

PRODUCT PREVIEW

20

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle

to stop the data stream currently on the

bus. If the Link is sending data to the

PHY, STP indicates the last byte of data

was on the bus in the previous cycle.

21

B3

VDD1.8

Power

N/A

External 1.8V Supply input pin. This pad

needs to be bypassed with a 0.1uF

capacitor to ground, placed as close as

possible to the USB3319.

22

B2

RESETB

Input,

CMOS,

Low

When low, the part is suspended with all

of the I/O tri-stated. When high the

USB3319 will operate as a normal ULPI

device.

23

A2

REFCLK

Input,

CMOS

N/A

13MHz Reference Clock input.

24

A1

RBIAS

Analog,

CMOS

N/A

Bias Resistor pin. This pin requires an

8.06k

Ω (±1%) resistor to ground, placed

as close as possible to the USB3319.

FLAG

C3

GND

Ground

N/A

Ground.

QFN only: The flag should be connected

to the ground plane with a via array

under the exposed flag. This is the main

ground for the IC.

Table 1 USB3319 Pin Description (continued)

PIN/

BALL

NAME

DIRECTION/

TYPE

ACTIVE

LEVEL

DESCRIPTION