 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMS320DM6443 Datasheet(PDF) 81 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TMS320DM6443 Datasheet(HTML) 81 Page - Texas Instruments |
|
|
81 / 223 page  3.6 Emulation Control TMS320DM6443 Digital Media System-on-Chip www.ti.com SPRS282F – DECEMBER 2005 – REVISED MARCH 2008 The flexibility of the DM644x architecture allows either the ARM or DSP to control the various peripherals (setup registers, service interrupts, etc.). While this assignment is purely a matter of software convention, during an emulation halt it is necessary for the device to know which peripherals are associated with the halting processor so that only those modules receive the suspend signal. This allows peripherals associated with the other (unhalted) processor to continue normal operation. The SUSPSRC register indicates the emulation suspend source for those peripherals which support emulation suspend. The SUSPSRC register format is shown in Figure 3-9. Brief details on the peripherals which correspond to the register bits is given in Table 3-33. When the associated SUSPSRC bit is ‘0’, the peripheral’s emulation suspend signal is controlled by the ARM emulator and when set to ‘1’ it is controlled by the DSP emulator. Figure 3-9. Emulation Suspend Source Register (SUSPSRC)(1) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 TIMR2 TIMR1 TIMR0 GPIO PWM2 PWM1 PWM0 SPI UART2 UART1 UART0 I2C ASP Rsvd Rsvd Rsvd SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0 15 13 12 11 10 9 8 6 5 4 0 HPI USB EMAC Reserved Reserved Reserved Reserved SRC SRC SRC R-000 R/W-0 R-00 R/W-0 R-000 R/W-0 R-0 0000 LEGEND: R = Read, W = Write, n = value at reset (1) For proper DM6443 device operation, always write a value of '0' to RSV bits 30 and 31. Table 3-33. SUSPSRC Register Description Name Description TIMR2SRC Timer2 (WD Timer) emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend TIMR1SRC Timer1 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend TIMR0SRC Timer0 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend GPIOSRC GPIO emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend PWM2SRC PWM2 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend PWM1SRC PWM1 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend PWM0SRC PWM0 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend SPISRC SPI emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend UART2SRC UART2 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend UART1SRC UART1 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend UART0SRC UART0 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend I2CSRC I2C emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend ASPSRC ASP emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend HPISRC HPI emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend Submit Documentation Feedback Device Configurations 81 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
