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TMS320DM6443 Datasheet(PDF) 13 Page - Texas Instruments |
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TMS320DM6443 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 223 page ![]() 2.3.8.1 ARM Internal Memories 2.3.8.2 External Memories 2.3.8.3 DSP Memories 2.3.8.4 ARM-DSP Integration 2.3.9 Peripherals 2.3.10 PLL Controller (PLLC) TMS320DM6443 Digital Media System-on-Chip www.ti.com SPRS282F – DECEMBER 2005 – REVISED MARCH 2008 The ARM has access to the following ARM internal memories: • 16KB ARM Internal RAM on TCM interface, logically separated into two 8KB pages to allow simultaneous access on any given cycle if there are separate accesses for code (I-TCM bus) and data (D-TCM) to the different memory regions. • 8KB ARM Internal ROM The ARM has access to the following external memories: • DDR2 Synchronous DRAM • Asynchronous EMIF / NOR Flash / NAND Flash • ATA/CF • Flash card devices: – MMC/SD with SDIO – xD – SmartMedia The ARM has access to the following DSP memories: • L2 RAM • L1P RAM • L1D RAM DM6443 ARM and DSP integration features are as follows: • DSP visibility from ARM’s memory map, see Section 2.5, Memory Map Summary, for details • Boot Modes for DSP - see Device Configurations section, Section 3.3.3, DSP Boot, for details • ARM control of DSP boot / reset - see Device Configurations section, Section 3.3.2, ARM Boot, for details • ARM control of DSP isolation and powerdown / powerup - see Section 3, Device Configurations, for details • ARM & DSP Interrupts - see Section 6.7.1, ARM CPU Interrupts, and Section 6.7.2, DSP Interrupts, for details The ARM9 has access to all of the peripherals on the DM6443 device. The ARM Subsystem includes the PLL Controller. The PLL Controller contains a set of registers for configuring DM6443’s two internal PLLs (PLL1 and PLL2). The PLL Controller provides the following configuration and control: • PLL Bypass Mode • Set PLL multiplier parameters • Set PLL divider parameters • PLL power down • Oscillator power down The PLLs are briefly described in this document in the Clocking section. For more detailed information on the PLLs and PLL Controller register descriptions, see Section 2.8.3, Documentation Support, of this document for the TMS320DM644x ARM Subsystem Reference Guide (literature number SPRUE14). Submit Documentation Feedback Device Overview 13 |
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