AS7343L datasheet(25/53 Pages) AMSOSRAM

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AS7343L

Datasheet

• PUBLIC

DS001038

• v2-00 • 2022-Aug-12

│ 24

10.2

Detailed Register Description

For easier readability, the detailed register description is done in groups of registers related to

dedicated device functions. This is not necessarily related to its register address.

Explanation of register access abbreviations:

RW = read or write

R = read only

W = write only

SC = self-clearing after access

10.2.1

Enable and Configuration Registers

The following registers are needed to power up and configure the device. To operate the device set bit

PON = “1” first (register 0x80) after that configure the device and enable interrupts before setting

SP_EN

= “1”. Changing configuration while SP_EN = “1” may result in invalid results.

ENABLE Register (Address 0x80)

Figure 21:

ENABLE Register

Addr: 0x80

ENABLE

Bit

Bit Name

Default

Access

Bit Description

7:5

Reserved

SMUXEN

SMUX Enable.

1: Starts SMUX command

Note: This bit gets cleared automatically as soon as

SMUX operation is finished

WEN

Wait Enable.

0: Wait time between two consecutive spectral

measurements disabled

1: Wait time between two consecutive spectral

measurements enabled

Reserved

SP_EN

Spectral Measurement Enable.

0: Spectral Measurement Disabled

1: Spectral Measurement Enabled

PON

Power ON.

0: AS7343L disabled

1: AS7343L enabled

Note: When bit is set, internal oscillator is activated,

allowing timers and ADC channels to operate.

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