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R5F52607ADFN Datasheet(PDF) 13 Page - Renesas Technology Corp |
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R5F52607ADFN Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 142 page ![]() R01DS0430EJ0100 Rev.1.00 Page 13 of 142 Jul 31, 2024 RX260 Group, RX261 Group 1. Overview 1.3 Block Diagram Figure 1.2 shows a block diagram. Figure 1.2 Block Diagram Clock generation circuit RX CPU RAM ROM Port 1 Port 2 Port 4 Port 5 Temperature sensor REMCa × 1 channel 8-bit D/A converter × 2 channels IWDTa CMT × 2 channels (Unit 1) RIICa × 1 channel RTCB × 1 channel TMRa × 2 channels (Unit 0) CRC DTCb ICUb Comparator B WDTA Port A Port B Port C Port D RSCI × 3 channels Port 3 12-bit A/D converter × 25 channels Port E Port G Port H DOC GPTW × 8 channels POEG SCIh × 1 channel TMRa × 2 channels (Unit 1) RSPIc × 1 channel Port 0 ELC LPTa CANFD × 1 channel CTSU2SLa CAC Port J RSIP-E11A SCIk × 3 channels E2 DataFlash USB 2.0 FS host/function module DMAC × 4 channels MPU CMT × 2 channels (Unit 0) ICUb: Interrupt controller DTCb: Data transfer controller DMAC: DMA controller WDT: Watchdog timer IWDTa: Independent watchdog timer ELC: Event link controller CRC: CRC (cyclic redundancy check) calculator SCIk, SCIh: Serial communications interface RSCI: Serial communications interface RSPI: Serial peripheral interface RIICa: I2C bus interface REMCa: Remote control signal receiver CANFD: CANFD module GPTW: General PWM timer POEG: Port output enable for GPTW CMT: Compare match timer RTCB: Realtime clock DOC: Data operation circuit CAC: Clock frequency accuracy measurement circuit CTSU2SLa: Capacitive touch sensing unit TMRa: 8-bit timer LPTa: Low power timer RSIP-E11A: Renesas Secure IP Note: Available functions depend on the product. |
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