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MK50H28 Datasheet(PDF) 2 Page - STMicroelectronics |
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MK50H28 Datasheet(HTML) 2 Page - STMicroelectronics |
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2 / 64 page ![]() MK50H28 will move multiple blocks of receive and transmit data directly into and out of memory through the Host’s bus. Moreover, the memory management capability includes the chaining of long frames. A possible system configuration for the MK50H28 is shown in Figure 1. The MK50H28 may be used with any of several popular 16 and 8 bit microprocessors, such as 68000, 6800, Z8000, Z80, LSI- 11, 8086, 8088, 8080, etc. The MK50H28 may be operated in either full or half duplex mode. In half duplex mode, the RTS and CTS modem control pins are provided. In full duplex mode, these pins become user program- mable I/O pins. All signal pins on the MK50H28 are TTL compatible. This has the advantage of making the MK50H28 independent of the physical interface. As shown in Figure 1, line drivers and receivers are used for electrical connection to the physical layer. DESCRIPTION (Continued) VSS-GND DAL07 DAL06 DAL05 DAL04 DAL03 DAL02 DAL01 DAL00 READ INTR DALI DALO DAS BMO, BYTE, BUSREL BMI, BUSAKO HOLD, BUSRQ ALE, AS CS ADR READY RESET VSS-GND 24 HLDA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 48 47 46 45 44 43 42 41 40 39 38 37 36 23 22 21 20 19 18 17 16 15 35 34 33 32 31 30 29 28 27 26 25 TCLK A18 A19 A20 A21 A22 A23 RD DSR, CTS TD SYSCLK RCLK DTR, RTS VCC (+5V) DAL08 DAL09 DAL10 DAL11 DAL12 DAL13 DAL14 DAL15 A16 A17 M K 5 0 H 2 8 DIP48 PIN CONNECTION (Top view) MK50H28 2/64 |
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