74HC_HCT10

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Product data sheet

Rev. 3 — 5 August 2016

7 of 14

NXP Semiconductors

74HC10; 74HCT10

Triple 3-input NAND gate

Test data is given in Table 9.

Definitions test circuit:

RT = termination resistance should be equal to output impedance Zo of the pulse generator.

CL = load capacitance including jig and probe capacitance.

Fig 7.

Test circuit for measuring switching times

Table 9.

Test data

Type

Input

Load

Test

VI

tr, tf

CL

74HC10

VCC

6.0 ns

15 pF, 50 pF

tPLH, tPHL

74HCT10

3.0 V

6.0 ns

15 pF, 50 pF

tPLH, tPHL