74HC_HCT10

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Product data sheet

Rev. 3 — 5 August 2016

2 of 14

NXP Semiconductors

74HC10; 74HCT10

Triple 3-input NAND gate

4.

Functional diagram

5.

Pinning information

5.1 Pinning

5.2 Pin description

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one gate)

Fig 4.

Pin configuration SO14

Fig 5.

Pin configuration for (T)SSOP14

Table 2.

Pin description

Symbol

Pin

Description

1A, 2A, 3A

1, 3, 9

data input

1B, 2B, 3B

2, 4, 10

data input

GND

7

ground (0 V)

1C, 2C, 3C

13, 5, 11

data input

1Y, 2Y, 3Y

12, 6, 8

data output

VCC

14

supply voltage