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115 Datasheet(PDF) 8 Page - Nexperia B.V. All rights reserved |
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115 Datasheet(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 16 page ![]() 74LV138 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 4 — 4 March 2016 8 of 16 NXP Semiconductors 74LV138 3-to-8 line decoder/demultiplexer; inverting Table 8. Measurement points Supply voltage Input Output VCC VM VM < 2.7 V 0.5VCC 0.5VCC 2.7 V to 3.6 V 1.5 V 1.5 V 4.5 V 0.5VCC 0.5VCC Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. Fig 8. Test circuit for measuring switching times Table 9. Test data Supply voltage Input VCC VI tr, tf < 2.7 V VCC 2.5 ns 2.7 V to 3.6 V 2.7 V 2.5 ns 4.5 V VCC 2.5 ns |
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