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ADP5072 Datasheet(PDF) 5 Page - Analog Devices |
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ADP5072 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 10 page ![]() Circuit Note CN-0359 analog.com Rev. C | 5 of 10 of 1 pA and 120 μV, respectively (A grade); making it an ideal component selection for this stage of the design. The symmetrical error produced by the 120 μV offset error is only 120 μV/10 V = 12 ppm. ADC CAPTURE AND MEASUREMENT The ADuCM360 generates the PWM0 square wave switching signal for the ADG1419 switch, as well as PWM1 and PWM2 synchronizing signals for the synchronous sampling stages. The cell voltage and the three timing waveforms are shown in Figure 5. Figure 5. Cell Voltage and Track-and-Hold Timing Signals The output of the AD8253 in amp drives two parallel track-and-hold circuits composed of ADG1211 switches, series resistors, hold capacitors, and unity-gain buffers. The ADG1211 is a low charge injection, quad SPST analog switch, operating on a ±15 V power supply with up to ±10 V input signals. The maximum charge injection due to switching is 4 pC, which produces a voltage error of only 4 pC ÷ 4.7 μF = 0.9 μV. The PWM1 signal causes the ADA4638-1 track-and-hold buffer to track the negative cycle of the sensor voltage and then hold it until the next track cycle. The output of the ADA4638-1 track-and-hold buffer is therefore a DC level corresponding to the negative ampli- tude of the sensor voltage square wave. Similarly, the PWM2 signal causes the other ADA4638-1 track-and- hold buffer to track the positive cycle of the sensor voltage and then hold it until the next track cycle. The output of the other ADA4638-1 track-and-hold buffer is therefore a DC level corresponding to the positive amplitude of the sensor voltage square wave. The bias current of the ADA4638-1 track-and-hold buffers is 45 pA typical, and the leakage current of the ADG1211 switch is 20 pA typical. Therefore, the worst-case leakage current on the 4.7 μF hold capacitors is 65 pA. For a 100 Hz excitation frequency, the period is 10 ms. The drop voltage over one-half the period (5 ms) due to the 65 pA leakage current is (65 pA × 5 ms) ÷ 4.7 μF = 0.07 μV. The offset voltage of the ADA4638-1 zero-drift amplifier is only 0.5 μV typical and contributes negligible error. The final stages in the signal chain before the ADC are the ADA4528-2 inverting attenuators that have a gain of −0.16 and a common-mode output voltage of +1.65 V. The ADA4528-2 has an offset voltage of 0.3 μV typical and therefore contributes negligible error. The attenuator stage reduces the ±10 V maximum signal to ±1.6 V with a common-mode voltage of +1.65 V. This range is compatible with the input range of the ADuCM360 ADC input, which is 0 V to 3.3 V (1.65 V ± 1.65 V) for an AVDD supply of 3.3 V. CALCULATING CONDUCTIVITY The four output voltages of the analog front end signal chain repre- sent the sampled current and voltage values of the conductivity cell during the positive and negative halves of the excitation cycle. The two outputs of the cell voltage measurement circuit are applied to the AIN2 and AIN3 pins of the ADuCM360. Similarly, the two outputs of the cell current measurement circuit are applied to the AIN0 and AIN1 pins. To obtain peak-to-peak values from these outputs, the internal ADC of the ADuCM360 is configured for differential mode. As such, the four individual outputs of the analog front end are reduced to two differential voltages that will be read by the ADuCM360. The two differential output voltages are given by Equation 5 and Equation 6: VOUT1=ADC2−ADC3 (5) VOUT2=ADC0−ADC1 (6) where: VOUT1 is the differential ADC voltage representing the peak-to- peak cell voltage in V. VOUT2 is the differential ADC voltage representing the peak-to- peak cell current in V. ADC0 is the AIN0 input voltage in V. ADC1 is the AIN1 input voltage in V. ADC2 is the AIN2 input voltage in V. ADC3 is the AIN3 input voltage in V. These differential voltages are used by the ADuCM360 to deter- mine the cell conductance and the conductivity of the liquid under test. As shown in Equation 7, the cell conductance is equal to the peak-to-peak cell current divided by the peak-to-peak cell voltage: Y= IP‐PV1P‐P (7) where: Y is the cell conductance in S. IP-P is the peak-to-peak cell current in A. V1P-P is the peak-to-peak cell voltage in V. Since the cell current is converted into a voltage signal by the feedback resistor of the ADA4627-1, its peak-to-peak value can be derived using Equation 8: IP‐P=V2P‐PRf (8) where: V2P-P is the peak-to-peak output of the ADA4627-1 in V. Rf is the ADA4627-1 feedback resistance in Ω. |
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