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74LVC594APW Datasheet(PDF) 10 Page - Nexperia B.V. All rights reserved |
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74LVC594APW Datasheet(HTML) 10 Page - Nexperia B.V. All rights reserved |
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10 / 20 page ![]() 74LVC594A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 2 — 21 October 2013 10 of 20 NXP Semiconductors 74LVC594A 8-bit shift register with output register 12. Waveforms Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 7. The shift clock (SHCP) to serial data output (Q7S) propagation delays, the shift clock pulse width and maximum shift clock frequency mna557 SH CP input Q7S output tPLH tPHL tW 1/fmax VM VOH VI GND VOL VM Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 8. The storage clock (STCP) to parallel data output (Qn) propagation delays, the storage clock pulse width and the shift clock to storage clock set-up time mna558 ST CP input Qn output tPLH tPHL tW tsu 1/fmax VM VOH VI GND VOL VM SH CP input VI GND VM |
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