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74LVC594APW Datasheet(PDF) 12 Page - Nexperia B.V. All rights reserved |
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74LVC594APW Datasheet(HTML) 12 Page - Nexperia B.V. All rights reserved |
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12 / 20 page ![]() 74LVC594A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 2 — 21 October 2013 12 of 20 NXP Semiconductors 74LVC594A 8-bit shift register with output register Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 11. The shift reset (SHR) pulse width, the shift reset to serial data output (Q7S) propagation delays and the shift reset to shift clock (SHCP) recovery time Measurement points are given in Table 8. VOL and VOH are typical output voltage drops that occur with the output load. Fig 12. The storage reset (STR) pulse width, the storage reset to parallel data output (Qn) propagation delays and the storage reset to storage clock (STCP) recovery time Table 8. Measurement points Supply voltage Input Output VCC VM VM VCC <2.7 V 0.5 V CC 0.5 V CC VCC 2.7 V 1.5 V 1.5 V |
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