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ST40RA Datasheet(PDF) 31 Page - STMicroelectronics |
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ST40RA Datasheet(HTML) 31 Page - STMicroelectronics |
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31 / 94 page  6 Clock generation ST40RA 31/94 STMicroelectronics ADCS 7260755H Figure 4: ST40RA clock domains SuperHyway CPU_CLK PER_CLK LMI_CLK EMI_SS_CLK CLOCKGEN PCI_SS_CLK PCI_BUS_CLK XTAL (X_ICK) SH-4 CPU SH-4 core (X_PCK) (X_BCK) LMI SDRAM DLL Flash. PCI subsystem or DDR CLK CLK subsystem PCI int. CLK PCI bus EMI subsystem LMI int STBUS_CLK STBUS_CLK memory MPX bus, SDRAM See CLOCKGENA.PLL1 clock domains See CLOCKGENA.PLL2 clock domains See CLOCKGENB.PLL1 clock domains peripherals core (X_PCK) 27 MHz |
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