V54C365804VC datasheet(51/54 Pages) MOSEL

51 / 54 page

V54C365804VC Rev. 0.6 September 1999

MOSEL VITELIC

V54C365804VC

Clock Enable (CKE) Truth Table:

Abbreviations:

RA = Row Address

BS = Bank Address

CA = Column Address

AP = Auto Precharge

Notes for SDRAM function truth table:

1. Current State is state of the bank determined by BS. All entries assume that CKE was active (HIGH) during the preceding clock cycle.

2. Illegal to bank in specified state; Function may be legal in the bank indicated by BS, depending on the state of that bank.

3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.

4. NOP to bank precharging or in Idle state. May precharge bank(s) indicated by BS (andAP).

5. Illegal if any bank is not Idle.

6. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied before any

command other than EXIT.

7. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.

8. Must be legal command as defined in the SDRAM function truth table.

STATE(n)

CKE

n-1

CKE

nCS

RAS

CAS

Addr

ACTION

Self-Refresh6

INVALID

EXIT Self-Refresh, Idle after tRC

ILLEGAL

NOP (Maintain Self-Refresh)

Power-Down

INVALID

EXIT Power-Down, > Idle.

ILLEGAL

NOP (Maintain Low-Power Mode)

All. Banks

Idle7

Refer to the function truth table

Enter Power- Down

ILLEGAL

Enter Self-Refresh

ILLEGAL

NOP

Any State

other than

listed above

Refer to the function truth table

Begin Clock Suspend next cycle8

Exit Clock Suspend next cycle8.

Maintain Clock Suspend.

V54C365804VC Datasheet(PDF) 51 Page - Mosel Vitelic, Corp

V54C365804VC Datasheet(HTML) 51 Page - Mosel Vitelic, Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

Datasheet Download

Link URL