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IMX27 Datasheet(PDF) 90 Page - Freescale Semiconductor, Inc

Part # IMX27
Description  Multimedia Applications
PDF  122 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

IMX27 Datasheet(HTML) 90 Page - Freescale Semiconductor, Inc

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i.MX27/iMX27L Data Sheet, Advance Information, Rev. 1
90
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Signal Descriptions
NOTE
All the timings for the SSI are given for a non-inverted serial clock polarity
(TSCKP/RSCKP = 0) and a non-inverted frame sync (TFSI/RFSI = 0). If the
polarity of the clock and/or the frame sync have been inverted, all the timing
remains valid by inverting the clock signal STCK/SRCK and/or the frame
sync STFS/SRFS shown in the tables and in the figures.
All timings are on AUDMUX pads when SSI is being used for data transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing is the
same as that of Tx Data, for example, during the AC97 mode of operation.
SS48
Oversampling clock high period
6
—
ns
SS49
Oversampling clock rise time
—
3
ns
SS50
Oversampling clock low period
6
—
ns
SS51
Oversampling clock fall time
—
3
ns
Table 46. SSI Receiver with Internal Clock Timing Parameters (continued)
ID
Parameter
Min
Max
Unit



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