C164CI_02 datasheet(74/484 Pages) INFINEON

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C164CI/C164SI

Derivatives

Central Processing Unit (CPU)

User’s Manual

4-16

V3.1, 2002-02

Processor Status Word PSW

This bit-addressable register reflects the current state of the microcontroller. Two groups

of bits represent the current ALU status, and the current CPU interrupt status. A separate

bit (USR0) within register PSW is provided as a general purpose user flag.

ALU Status (N, C, V, Z, E, MULIP)

The condition flags (N, C, V, Z, E) within the PSW indicate the ALU status after the most

recently performed ALU operation. They are set by most of the instructions according to

specific rules which depend on the ALU or data movement operation performed by an

instruction.

After execution of an instruction which explicitly updates the PSW register, the condition

flags cannot be interpreted as described below because any explicit write to the PSW

PSW

Program Status Word

SFR (FF10H/88H)

Reset Value: 0000H

9876

543210

ILVL

IEN

USR0 MUL

rwh

Bit

Function

Negative Result

Set, when the result of an ALU operation is negative.

CCarry Flag

Set, when the result of an ALU operation produces a carry bit.

Overflow Result

Set, when the result of an ALU operation produces an overflow.

Zero Flag

Set, when the result of an ALU operation is zero.

End of Table Flag

Set, when the source operand of an instruction is 8000H or 80H.

MULIP

Multiplication/Division In Progress

0: There is no multiplication/division in progress.

1: A multiplication/division has been interrupted.

USR0

User General Purpose Flag

May be used by the application software.

ILVL, IEN

Interrupt Control Fields

Define the response to interrupt requests. (Described in Chapter 5)

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