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XC161 Datasheet(PDF) 30 Page - Infineon Technologies AG |
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XC161 Datasheet(HTML) 30 Page - Infineon Technologies AG |
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30 / 419 page ![]() XC161 Derivatives Peripheral Units (Vol. 2 of 2) The General Purpose Timer Units User’s Manual 14-16 V2.2, 2004-01 GPT_X1, V2.0 TxCHDIR 14 rwh Timer Tx Count Direction Change This bit is set each time the count direction of timer Tx changes. TxCHDIR must be cleared by SW. 0 No change in count direction was detected 1 A change in count direction was detected TxEDGE 13 rwh Timer Tx Edge Detection The bit is set each time a count edge is detected. TxEDGE must be cleared by SW. 0 No count edge was detected 1 A count edge was detected TxIRDIS 12 rw Timer Tx Interrupt Request Disable 0 Interrupt generation for TxCHDIR and TxEDGE interrupts in Incremental Interface Mode is enabled 1 Interrupt generation for TxCHDIR and TxEDGE interrupts in Incremental Interface Mode is disabled TxRC 9rw Timer Tx Remote Control 0 Timer Tx is controlled by its own run bit TxR 1 Timer Tx is controlled by the run bit T3R of core timer 3, not by bit TxR TxUDE 8rw Timer Tx External Up/Down Enable 0 Input TxEUD is disconnected 1 Direction influenced by input TxEUD 1) TxUD 7rw Timer Tx Up/Down Control 1) TxR 6rw Timer Tx Run Bit 0Timer Tx stops 1Timer Tx runs Note: This bit only controls timer Tx if bit TxRC = 0. TxM [5:3] rw Timer Tx Mode Control (Basic Operating Mode) 000 Timer Mode 001 Counter Mode 010 Gated Timer Mode with gate active low 011 Gated Timer Mode with gate active high 100 Reload Mode 101 Capture Mode 110 Incremental Interface Mode (Rotation Detect.) 111 Incremental Interface Mode (Edge Detection) Field Bits Typ Description |
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