REV. 0

AD7492

–12–

CONVST

BUSY

880ns

1.12 s

2 s

Figure 12. Mode 1 Power Dissipation

Mode 2 (Full Sleep Mode)

Figure 13 shows the AD7492 conversion sequence in Mode 2,

Full Sleep mode, using a throughput rate of approximately

100 SPS. At 5 V supply the current consumption for the part

when converting is 3 mA, while the full sleep current is 1

µA

max. The power dissipated during this power-down is negligible

and thus not worth considering in the total power figure. During

the wake-up phase, the AD7492 will draw typically 1.8 mA. Over-

all power dissipated is:

(880 ns/10 ms)

× (5 × 3 mA) + (500 µs/10 ms) × (5 × 1.8 mA)

= 451.32

µW

CONVST

BUSY

880ns

9.5ms

500 s

10ms

Figure 13. Full Sleep Power Dissipation

Mode 2 (Partial Sleep Mode)

Figure 14 shows the AD7492 conversion sequence in Mode 2,

Partial Sleep mode, using a throughput rate of 1 kSPS. At 5 V

supply the current consumption for the part when converting is

3 mA, while the partial sleep current is 250

µA max. During the

wake-up phase, the AD7492 will draw typically 1.8 mA. Power

dissipated during wake-up and conversion is :

(880 ns/1 ms)

× (5 × 3 mA) + (20 µs/1 ms) × (5 × 1.8 mA) =

193.2

µW

Power dissipated during power-down is:

(979

µs/1 ms) × (5 × 250 µA) = 1.22 mW

Overall power dissipated is:

193.2

µW + 1.22 mW = 1.41 mW

CONVST

BUSY

880ns

979 s

20 s

1ms

Figure 14. Partial Sleep Power Dissipation

drivers and the digital input circuitry. It is a separate supply

for the digital input/output interface is that the user can vary the

powered from a 3 V supply. The ADC has better dynamic per-

formance at 5 V than at 3 V, so operating the part at 5 V, while

still being able to interface to 3 V parts, pushes the AD7492 to

the top bracket of high performance 12-bit A/Ds. Of course, the

and be powered from a 3 V or 5 V supply. The trigger levels are

RD, CONVST, and BUSY.

PS/

FS PIN

As previously mentioned, the PS/

FS pin is used to control the

type of power-down mode that the AD7492 can enter into if

operated in Mode 2. This pin can be hardwired either high or

low, or even controlled by another device. It is important to

note that toggling the PS/

FS pin while in power-down mode will

not switch the part between partial sleep and full sleep modes.

To switch from one sleep mode to another, the AD7492 will have

to be powered up and the polarity of the PS/

FS pin changed. It

can then be powered down to the required sleep mode.

POWER-UP

It is recommended that the user performs a dummy conversion

after power-up, as the first conversion result could be incorrect.

This also ensures that the parts is in the correct mode of opera-

tion. The recommended power-up sequence is as follows:

1 > GND

4 > Digital Inputs

Power vs. Throughput

The two modes of operation for the AD7492 will produce dif-

ferent power versus throughput performances, Mode 1 and

Mode 2; see Operating Modes section of the data sheet for more

detailed descriptions of these modes. Mode 2 is the Sleep Mode

(Partial/Full) of the part and it achieves the optimum power

performance.

Mode 1

Figure 12 shows the AD7492 conversion sequence in Mode 1

using a throughput rate of 500 kSPS. At 5 V supply the current

consumption for the part when converting is 3 mA and the quies-

cent current is 1.8 mA. The conversion time of 880 ns contributes

6.6 mW to the overall power dissipation in the following way:

(880 ns/2

µs) × (5 × 3 mA) = 6.6 mW

The contribution to the total power dissipated by the remaining

1.12

µs of the cycle is 5.04 mW.

(1.12

µs/2 µs) × (5 × 1.8 mA) = 5.04 mW

Thus the power dissipated during each cycle is:

6.6 mW + 5.04 mW = 11.64 mW