| Electronic Components Datasheet Search |
|
M48Z2M1Y Datasheet(PDF) 1 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M48Z2M1Y Datasheet(HTML) 1 Page - STMicroelectronics |
|
1 / 17 page ![]() 1/17 March 2005 M48Z2M1Y M48Z2M1V 5V or 3.3V, 16 Mbit (2Mb x 8) ZEROPOWER® SRAM FEATURES SUMMARY ■ INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERIES ■ CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES ■ 10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER ■ AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION ■ WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): – M48Z2M1Y: VCC = 4.5 to 5.5V 4.2V ≤ VPFD ≤ 4.5V – M48Z2M1V: VCC = 3.0 to 3.6V 2.8V ≤ VPFD ≤ 3.0V ■ BATTERIES ARE INTERNALLY ISOLATED UNTIL POWER IS APPLIED ■ PIN AND FUNCTION COMPATIBLE WITH JEDEC STANDARD 2Mb x 8 SRAMs Figure 1. 36-pin, DIP Module PLDIP36 (PL) Module 36 1 |
Similar Part No. - M48Z2M1Y |
|
Similar Description - M48Z2M1Y |
|
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |