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LFSC Datasheet(PDF) 233 Page - Lattice Semiconductor |
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LFSC Datasheet(HTML) 233 Page - Lattice Semiconductor |
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233 / 237 page  June 2008 Data Sheet DS1004 © 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 7-1 DS 1004 Revision History Date Version Section Change Summary February 2006 01.0 — Initial release. March 2006 01.1 Introduction SC25 1020 I/O count changed to 476. Architecture Changed ROM 16X4 to ROM 16X2. Changed “X2 or X4” to “DIV2 or DIV4”. Added Global Set/Reset Section. DC and Switching Characteristics Added notes 5 and 6 to Recommended Operating Conditions table. Added Power Supply Ramp Rates table. Removed -5 and -6 speed grades from Typical Building Block Perfor- mance table. Added Input Delay Timing table. Added Synchronous GSR Timing table. Pinout Information Expanded PROBE_VCC and PROBE_GND description. Removed A-RXREFCLKP_[L/R] from Signal Description table. Added RESP_[ULC/URC] to Signal Description table. Added notes 1 and 2 to Signal Description table. Changed number of NCs to 28. Changed number of SERDES (signal + power supply) to 74. Removed RESP balls from NC list (B2, C2, B29, C29). Added note to VTT table. Changed RxRefclk (B2 and C2) to NC. Added RESP_ULC. Added RESP_URC. Changed RxRefclk (B29 and C29) to NC. June 2006 01.2 Introduction Changed SERDES min bandwidth from 622 Mbps to 600 Mbps. Changed max SERDES bandwidth from 3.4 Gbps to 3.8 Gbps. Corrected number of package I/Os for the SC80 and SC115 1704 pin packages. Updated speed performance for typical functions with ispLEVER 6.0 values. Architecture Changed “When these pins are not used they should be left uncon- nected.” with “Unused VTT pins should be connected to GND if the internal or external VCMT function is not used in the bank. If the internal or external VCMT function for differential input termination is used, the VTT pins should be unconnected and allowed to float.” Added “SERDES Power Supply Sequencing Requirements” section. Changed total bandwidth per quad from 13.6 Gbps to 15.2 Gbps. Added the accuracy of the temperature-sensing diode to be typically +/- 10 °C. Also referred to a temperature-sensing diode application note for more information. DC and Switching Characteristics Changed “CTAP” to “internal or external VCMT”. Changed VCC12 parameter to include VDDP, VDDTX and VDDRX. Changed typical values to match ispLEVER 6.0 Power Calculator. LatticeSC/M Family Data Sheet Revision History |
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