TAS3218IPZP datasheet(56/78 Pages) TI

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TAS3218

SLES235 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com

Table 14. M8051 Microcontroller Program RAM

and External Data RAM Block Structure(1)

CALC

TOTAL

REG

BYTE

DATA BLOCK FORMAT

CHECK

NUM

NOTE

SUM

BYTE

Checksum MSB

Checksum LSB

Memory to be loaded 0x00 or

0x01

0x00

Control

Start memory address MSB

0x04

Start memory address LSB

Total number of byte transferred

MSB

Total number of byte transferred

LSB

Datum 1 D7D0

Datum 2 D7D0

Datum 3 D7D0

Data

Datum 4D7D0

Datum 5 D7D0

0x05

Datum 6 D7D0

Datum 7 D7D0

Datum 8 D7D0

Datum 9 D7D0

Datum 10 D7D0

Datum 11D7D0

Data

Datum 12 D7D0

Datum 13 D7D0

0x05

Datum 14 D7D0

Datum 15 D7D0

Datum 16 D7D0

Datum N-3 D7D0

If the last data register datum

Datum N-2 D7D0

is less than 6 byte, zero data

Datum N-1 D7D0

should be filled.

Data

Datum N D7D0

0x00

0x05

Should be zero

0x00

Checksum MSB

End checksum is always

located here

Checksum LSB

(1)

Shades cells indicate the values included in the checksum/total number of bytes calculation.

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