34844 datasheet(32/37 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34844

TYPICAL APPLICATIONS

LAYOUT GUIDELINES

RECOMMENDED STACK-UP

The following table shows the recommended layer stack-

up for the signals to have good shielding and Thermal

Dissipation.

DECOUPLING CAPS

It is recommended to place decoupling caps of 100pf at

the beginning and at the end of any power signal traces to

filter high frequency noise.

Decoupling caps of 100pf should be also placed at the end

of any long trace to cancel antenna effects on it.

These caps should be located as closed as possible to the

point to be decoupled and the connection to GND should be

as short as possible.

SM_BUS/I2C COMMUNICATION AND CLOCK

SIGNALS (SDA, SCK AND CK)

To avoid contamination of these signals by nearby high

power or high frequency signals, it is a good practice to shield

them with ground planes placed on adjacent layers. Make

sure the ground plane is uniform through the whole signal

trace length.

Figure 19. Recommended shielding for critical signals.

These signals shall not run parallel to power signals or

other clock signals in the same routing layer. If they have to

cross or to be routed close to a power signal, it is a good

practice to trace them perpendicularly or at 45° on a different

layer to avoid coupling noise.

SWITCHING NODE (SWA & SWB)

The components associated to this node must be placed

as close as possible to each other to keep the switching loop

small enough so that it does not contaminate other signals.

However, care must be taken to ensure the copper traces

used to connect these components together on this node are

capable to handle the necessary current and voltage.

As a reference, a 10mils trace with a thickness of 1 oz of

copper is capable of handling one ampere.

Traces for connecting the inductor, input and output caps

should be as wide and short as possible to avoid adding

inductance or resistance to the loop. The placement of these

components should be selected far away from sensitive

signals like compensation, feedback and internal regulators

to avoid power noise coupling.

COMPENSATION COMPONENTS

Components related with COMP pin need to be placed as

close as possibThe trace of the feedback signal (VOUT)

should be routed perpendicularly or at 45° on a different layer

to avoid coupling noise, preferably between ground or power

planes.

FEEDBACK SIGNAL

The trace of the feedback signal (VOUT) should be routed

perpendicularly or at 45° on a different layer to avoid coupling

noise, preferably between ground or power planes.

Figure 20. Feedback Signal Tracing

Table 9. Layer Stacking Recommendations

Stack-Up

Layer 1 (Top)

Signal

Layer 2 (Inner 1)

Ground

Layer 3(Inner 2)

Signal

Layer 4 (Bottom)

Ground

Signal

Ground Plane

Ground Planes

Signal

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