| Electronic Components Datasheet Search |
|
MCF52221 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MCF52221 Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc |
|
21 / 56 page ![]() MCF52223 Family Configurations MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor 21 1.3 Reset Signals Table 3 describes signals used to reset the chip or as a reset indication. 1.4 PLL and Clock Signals Table 4 describes signals used to support the on-chip clock generation circuitry. 1.5 Mode Selection Table 5 describes signals used in mode selection; Table 6 describes the particular clocking modes. Table 3. Reset Signals Signal Name Abbreviation Function I/O Reset In RSTI Primary reset input to the device. Asserting RSTI for at least 8 CPU clock cycles immediately resets the CPU and peripherals. I Reset Out RSTO Driven low for 1024 CPU clocks after the reset source has deasserted. O Table 4. PLL and Clock Signals Signal Name Abbreviation Function I/O External Clock In EXTAL Crystal oscillator or external clock input except when the on-chip relaxation oscillator is used. I Crystal XTAL Crystal oscillator output except when CLKMOD1=1, then sampled as part of the clock mode selection mechanism. O Clock Out CLKOUT This output signal reflects the internal system clock. O Table 5. Mode Selection Signals Signal Name Abbreviation Function I/O Clock Mode Selection CLKMOD[1:0] Selects the clock boot mode. I Reset Configuration RCON The Serial Flash Programming mode is entered by asserting the RCON pin (with the TEST pin negated) as the chip comes out of reset. During this mode, the EzPort has access to the flash memory which can be programmed from an external device. Test TEST Reserved for factory testing only and in normal modes of operation should be connected to VSS to prevent unintentional activation of test functions. I Table 6. Clocking Modes CLKMOD[1:0] XTAL Configure the clock mode. 00 0 PLL disabled, clock driven by external oscillator 00 1 PLL disabled, clock driven by on-chip oscillator 01 N/A PLL disabled, clock driven by crystal 10 0 PLL in normal mode, clock driven by external oscillator 10 1 PLL in normal mode, clock driven by on-chip oscillator 11 N/A PLL in normal mode, clock driven by crystal |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |