M62376GP

REJ03D0881-0300 Rev.3.00 Mar 25, 2008

Page 7 of 10

Data Structure

Serial data

MSB

LSB

S14

S15

S12

S13

S10

S11

S8

S9

S6

S7

S4

S5

S2

S3

S0

S1

Data for DAC and I/O expander

Address data

Address Data

S3

S2

S1

S0

Setup

0

0

0

0

(a)

0

0

0

1

A1 selection

0

0

1

0

A2 selection

0

0

1

1

A3 selection

0

1

0

0

A4 selection

0

1

0

1

A5 selection

0

1

1

0

A6 selection

0

1

1

1

A7 selection

1

0

0

0

A8 selection

1

0

0

1

A9 selection

1

0

1

0

A10 selection

1

0

1

1

A11 selection

1

1

0

0

A12 selection

1

1

0

1

I/O expander (serial

→ parallel conversion)

1

1

1

0

I/O expander (parallel

→ serial conversion)

1

1

1

1

I/O expander status setup

• I/O expander (serial → parallel conversion)

Outputs data on S4 to S15 to pins D0 to D11.

S3

S2

S1

S0

1

1

0

1

• I/O expander (parallel → serial conversion)

Writes data on D0 to D11 pins into S4 to S15.

When next data communication is provided, outputs data sequentially from SO pin at the rise of the shift clock

(CLK).

S3

S2

S1

S0

1

1

1

0

• I/O expander status setup register

Sets input/output pin of I/O expanders.

Data: "0" = Input mode (Hi-Z status), "1" = Output mode

S3

S2

S1

S0

1

1

1

1

S15 S14 S13 S12 S11 S10 S9 S8

S7 S6 S5 S4

D11

Data

Pin

D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0