R32C121 datasheet(84/113 Pages) RENESAS

84 / 113 page

REJ03B0237-0050 Rev.0.50 Jul 31, 2008

Page 84 of 111

Under development

Preliminary Specification

This is a preliminary specification and is subject to change.

R32C/121 Group

5. Electrical Characteristics

Note:

This value is applicable only when the main clock oscillation is stable.

Note:

this recovery time does not include the period until both the main clock and sub clock oscillators are

stabilized. The CPU starts operating before the oscillators are stabilized.

Figure 5.4

Clock Circuit Timing

Table 5.13

Electrical Characteristics of Oscillator

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ. Max.

fSO(PLL)

PLL clock self-oscillation frequency

MHz

tOSC(PLL) PLL frequency synthesizer stabilization time

(1)

1ms

tjitter(p-p)

PLL jitter period (p-p)

2.0

f(OCO)

On-chip oscillator frequency

125

156

kHz

Table 5.14

Electrical Characteristics of Clock Circuitry

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ. Max.

trec(STOP) Recovery time from stop mode (1)

225

µs

trec(WAIT) Recovery time from wait mode to low power mode

225

µs

t rec(STOP)

Interrupt for exiting

stop mode

Recovery time from stop mode

t rec(STOP)

CPU clock

Main clock oscillator

output

On-chip oscillator

output

t rec(WAIT)

Interrupt for exiting

wait mode

Sub clock oscillator

output

Recovery time from wait mode

to low power mode

t rec(WAIT)

CPU clock

On-chip oscillator

output

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