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M37702S1AFP Datasheet(PDF) 23 Page - Renesas Technology Corp |
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M37702S1AFP Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 60 page  22 MITSUBISHI MICROCOMPUTERS M37702M2AXXXFP, M37702M2BXXXFP M37702S1AFP, M37702S1BFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER (4) Pulse width modulation mode [11] Figure 24 shows the bit configuration of the timer Ai mode register during pulse width modulation mode. In pulse width modulation mode, bits 0, 1, and 2 must be set to “1”. Bit 5 is used to deter- mine whether to perform 16-bit length pulse width modulator or 8-bit length pulse width modulator. 16-bit length pulse width modu- lator is performed when bit 5 is “0” and 8-bit length pulse width modulator is performed when it is “1”. The 16-bit length pulse width modulator is described first. The pulse width modulator can be started with a software trigger or with an input signal from a TAiIN pin (external trigger). The software trigger mode is selected when bit 4 is “0”. Pulse width modulator is started and pulse is output from TAiOUT when the timer Ai start flag is set to “1”. The external trigger mode is selected when bit 4 is “1”. Pulse width modulator starts when a trigger signal is input from the TAiIN pin when the timer Ai start flag is “1”. Whether to trigger at the fall or rise of the trigger signal is determined by bit 3. The trigger is at the fall of the trigger signal when bit 3 is “0” and at the rise when it is “1”. When data is written to timer Ai with the pulse width modulator halted, it is written to the reload register and the counter. Then when the timer Ai start flag is set to “1” and a software trig- ger or an external trigger is issued to start modulation, the waveform shown in Figure 25 is output continuously. Once modu- lation is started, triggers are not accepted. If the value in the reload register is m, the duration “H” of pulse is and the output pulse period is An interrupt request signal is generated and the interrupt request bit in the timer Ai interrupt control register is set at each fall of the output pulse. The width of the output pulse is changed by updating timer data. The update can be performed at any time. The output pulse width is changed at the rise of the pulse after data is written to the timer. The contents of the reload register are transferred to the counter just before the rise of the next pulse so that the pulse width is changed from the next output pulse. Undefined data is read when timer Ai is read. The 8-bit length pulse width modulator is described next. The 8-bit length pulse width modulator is selected when the timer Ai mode register bit 5 is “1”. The reload register and the counter are both divided into 8-bit halves. The low order 8 bits function as a prescaler and the high order 8 bits function as the 8-bit length pulse width modulator. The prescaler counts the clock selected by bits 6 and 7. A pulse is gen- erated when the counter reaches 000016 as shown in Figure 26. At the same time, the contents of the reload register is transferred to the counter and count is continued. 1 selected clock frequency ! m 1 selected clock frequency ! (216 – 1). Fig. 24 Timer Ai mode register bit configuration during pulse width modulation mode 7 654 3 2 1 0 11 1 Timer A0 mode register 5616 Timer A1 mode register 5716 Timer A2 mode register 5816 Timer A3 mode register 5916 Timer A4 mode register 5A16 Addresses 1 : Always “1” in pulse width modulation mode 0 ! : Software trigger 1 0 : Trigger at the falling of TAi IN input 1 1 : Trigger at the rising of TAiIN input Clock source selection bit 0 0 : Select f2 0 1 : Select f16 1 0 : Select f64 1 1 : Select f512 1 1 : Always “11” in pulse width modulation mode 0 : 16 bit pulse width modulator 1 : 8 bit pulse width modulator |
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