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SH7145 Datasheet(PDF) 97 Page - Renesas Technology Corp |
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SH7145 Datasheet(HTML) 97 Page - Renesas Technology Corp |
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97 / 930 page  4. Clock Pulse Generator CPG0111A_010120030800 Rev.4.00 Mar. 27, 2008 Page 53 of 882 REJ09B0108-0400 Section 4 Clock Pulse Generator This LSI has an on-chip clock pulse generator (CPG) that generates the system clock ( φ) and the peripheral clock (P φ), and then makes internal clock (φ/2 to φ/8192 and Pφ/2 to Pφ/1024) out of this generated clock. The CPG consists of an oscillator, PLL circuit, and pre-scaler. A block diagram of the clock pulse generator is shown in figure 4.1. The frequency from the oscillator can be modified by the PLL circuit. PLLCAP EXTAL XTAL MD2 MD3 Pre-scaler Pre-scaler Oscillator for internal circuit PLL circuit Clock divider ( × 1/2) Clock mode control circuitry φ/2 to φ/8192 P φ/2 to P φ/1024 φ CK P φ Figure 4.1 Block Diagram of Clock Pulse Generator |
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