M32C83T datasheet(334/527 Pages) RENESAS

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Page 311

21. Intelligent I/O (Group 2 Communication Function)

)

(

Table 21.31 Register to be Used and Settings

Bit

Function

G2BCR0

BCK1 to BCK0

Set to "112"

DIV4 to DIV0

Select divide ratio of count source

Set to "0"

G2BCR1

7 to 0

Set to "0001 00102"

G2POCR0

7 to 0

Set to "0000 01112"

G2POCR1

7 to 0

Set to "0000 01112"

G2BCR2

7 to 0

Set to "0000 00102"

G2PO0

15 to 0

Set bit rate

= transfer clock frequency

G2PO2

15 to 0

Set to a value smaller than the G2PO0 register

G2FE

IFE2 to IFE0

Set to "1112"

G2MR

GMD1 to GMD0

Set to "012"

CKDIR

Select internal or external clock

UFORM

Select either LSB first or MSB first

IRS

Select how the transmit interrupt is generated

G2CR

When transmission is enabled, set to "1"

TXEPT

Transmit register empty flag

Transmit buffer empty flag

When reception is enabled, set to "1"

Receive complete flag

OPOL

ISTxD2 output polarity inverse (usually set to "0")

IPOL

ISRxD2 input polarity inverse (usually set to "0")

G2TB

15 to 0

Write transfer bit length and transmit data

G2RB

15 to 0

Received data and error flag are stored

fBT2

2 x (setting value + 2)

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