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M32C83T Datasheet(PDF) 351 Page - Renesas Technology Corp |
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M32C83T Datasheet(HTML) 351 Page - Renesas Technology Corp |
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351 / 527 page ![]() Page 328 8 8 4 f o 6 0 0 2 , 1 3 . n a J 1 3 . 1 . v e R 1 3 1 0 - 4 3 0 0 B 9 0 J E R 22. CAN Module ) T 3 8 / C 2 3 M , 3 8 / C 2 3 M ( p u o r G 3 8 / C 2 3 M NOTES: 1. Change the BASICCAN bit only when the STATE_RESET bit is set to "1" (CAN module reset completed). 2. The message slot 14 is the first slot to become active after the RESET0 and RESET1 bits are set to "0". 3. The message slots 0 to 13 are not affected by entering BasicCAN mode. 22.1.1.4 TSPRE1, TSPRE0 Bits The TSPRE1 and TSPRE0 bits determine which count source is used for the time stamp counter. NOTES: 1. Change the TSPRE1 to TSPRE0 bits only when the STATE_RESET bit is set to "1" (CAN module reset completed). 22.1.1.5 TSRESET Bit When the TSRESET bit is set to "1" (counter reset), the C0TSR register is set to "000016". The TSRESET bit is automatically set to "0" after the C0TSR register is set to "000016". 22.1.1.6 ECRESET Bit When the ECRESET bit is set to "1", the C0TEC and C0REC registers are set to "0016". The CAN module forcibly goes into an error active state. The ECRESET bit is automatically set to "0" after the CAN module enters an error active state. NOTES: 1. In an error active state, the CAN module is ready to communicate when 11 continuous reces- sive bits are detected on the CAN bus. |
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