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M32C83T Datasheet(PDF) 349 Page - Renesas Technology Corp |
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M32C83T Datasheet(HTML) 349 Page - Renesas Technology Corp |
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349 / 527 page ![]() Page 326 8 8 4 f o 6 0 0 2 , 1 3 . n a J 1 3 . 1 . v e R 1 3 1 0 - 4 3 0 0 B 9 0 J E R 22. CAN Module ) T 3 8 / C 2 3 M , 3 8 / C 2 3 M ( p u o r G 3 8 / C 2 3 M 22.1 CAN-Associated Registers Figures 22.3 to 22.26 show registers associated with CAN. To access the associated registers, set the MCD4 to MCD0 bits in the MCD register to "100102" (no division of CPU clock), the PM13 bit in the PM1 register to "1" (2 wait states), and the CM07 bit in the CM0 register to "0" (XIN-XOUT selected). 22.1.1 CAN0 Control Register 0 (C0CTLR0 Register) CAN0 Control Register 0 Symbol Address After Reset(1) C0CTLR0 020116 - 020016 XXXX 0000 XX01 0X012 RW RESET1 TSPRE0 TSRESET CAN Reset Bit 1 Time Stamp Counter Reset Bit 0: CAN module reset exited 1: CAN module is reset(2) RESET0 (b2) (b5) (b7 - b6) (b15 - b12) LOOPBACK BASICCAN CAN Reset Bit 0 Loop Back Mode Select Bit Basic CAN Mode Select Bit 0 0: Selects the CAN bus bit clock 0 1: Selects the CAN bus bit clock divided by 2 1 0: Selects the CAN bus bit clock divided by 3 1 1: Selects the CAN bus bit clock divided by 4 b9 b8 0 : Disables BasicCAN mode function 1 : Enables BasicCAN mode function 0: Disables Loop back function 1: Enables Loop back function 0: CAN module reset exited 1: CAN module is reset(2) TSPRE1 When this bit is set to "1", the C0TSR register is set to "000016". After that, this bit is automatically set to "0".(3) ECRESET Error Counter Reset Bit When this bit is set to "1", the C0TEC and C0REC registers are set to "0016". After that, this bit is automatically set to "0".(3) Time Stamp Prescaler Select Bit Reserved Bit Set to "0". Bit Name Function Bit Symbol Nothing is assigned. When write, set to "0". When read, its content is indeterminate. Nothing is assigned. When write, set to "0". When read, its content is indeterminate. Nothing is assigned. When write, set to "0". When read, its content is indeterminate. RW RW RW RW RW RW RW RW RW NOTES: 1. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) and supplying a clock to the CAN module after reset. 2. Set the RESET0 bit and RESET1 bit to the same value simultaneously. 3. This bit can be set to "1" by program, but cannot be set to "0". b7 b0 b15 b8 0 Figure 22.3 C0CTLR0 Register |
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