M32C83T datasheet(236/527 Pages) RENESAS

236 / 527 page

Page 213

16. Serial I/O (Special Function)

)

(

To generate the internal clock synchronized with the external clock, first set the SU1HIM bit in the

UiSMR2 register (i=0 to 4) and the SCLKDIV bit in the UiSMR register to values shown in Table 16.29.

Then apply a trigger signal to the CTSi pin. Either the same clock cycle as the external clock or external

clock divided by two can be selected as the transfer clock. The SCLKSTPB bit in the UiC1 register

controls the transfer clock. Set the SCLKSTPB bit accordingly, to start or stop the transfer clock during an

external clock operation. Figure 16.27 shows an example of the clock-divided synchronous function.

Table 16.29 Clock-Divided Synchronous Function Select

SCLKDIV Bit in

SU1HIM Bit in

Clock-Divided Synchronous Function

Example of Waveform

UiSMR Register

UiSMR2 Register

Not synchronized

Same division as the external clock

A in Figure 16.27

0 or 1

Same division as the external clock

B in Figure 16.27

divided by 2

i=0 to 4

Figure 16.27 Clock-Divided Synchronous Function

Trigger Signal

from the CTSi Pin

External Clock

from the CLKi Pin

Transfer Clock

TxDi

Transfer Clock

i=0 to 4

A, B : See Table 16.29.

TxDi

12345678

1234567

The SCLKSTPB bit in the UiC1 register

stops the clock

M32C83T Datasheet(PDF) 236 Page - Renesas Technology Corp