M32C83T datasheet(254/527 Pages) RENESAS

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Page 231

17. A/D Converter

)

(

Figure 17.5 AD1CON0 Register

Function

A/D1 Control Register 0(1)

Bit Name

Bit

Symbol

Address

After Reset

AD1CON0

01D616

0016

CH0

CH1

CH2

Analog Input Pin

Select Bit(2, 3, 4, 5, 6)

MD0

MD1

TRG

CKS0

ADST

A/D Operation

Mode Select Bit 0(2)

A/D Conversion

Start Flag

Trigger Select Bit

Frequency Select

Bit(8)

0 : Software trigger

1 : External trigger, hardware trigger(7)

0 : A/D conversion stops

1 : A/D conversion starts(7)

0 : Select from fAD/3 or fAD/4

1 : Select from fAD/1 or fAD/2

0 0 : One-shot mode

0 1 : Repeat mode

1 0 : Single sweep mode

1 1 : Repeat sweep mode 0 or 1

0 0 0 : ANi0

0 0 1 : ANi1

0 1 0 : ANi2

0 1 1 : ANi3

1 0 0 : ANi4

1 0 1 : ANi5

1 1 0 : ANi6

1 1 1 : ANi7

b2 b1

b4 b3

(i=0, 2, 15)

CKS0

CKS1

fAD divided by 4

fAD divided by 3

fAD divided by 2

fAD

NOTES:

1. When the AD1CON0 register is rewritten during the A/D conversion, the conversion result is

indeterminate.

2. Set analog input pins again after changing A/D operation mode.

3. This bit is disabled in single sweep mode, repeat sweep mode 0 and repeat sweep mode 1.

4. The APS1 to APS0 bit in the AD1CON2 register select i=0, 2 or 15.

5. i=0 or 2 is available in single-chip mode only.

6. i=15 is available in the 144-pin package.

7. To set the TRG bit to "1", select the cause of trigger by setting the the TRG1 and TRG0 bits in the

AD1CON2 register. Then set the ADST bit to "1" after the TRG bit is set to "1".

frequency must be under 16 MHz when VCC=5V.

frequency must be under 10 MHz when VCC=3.3V.

Combination of the CKS0 and CKS1 bits selects

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