M32C83T datasheet(256/527 Pages) RENESAS

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Page 233

17. A/D Converter

)

(

Bit name

A/D1 Control Register 2(1)

Bit Name

Bit

Symbol

Address

After Reset

AD1CON2

01D416

X00X X0002

SMP

APS0

APS1

A/D Conversion

Method Select Bit

0 : Without the sample and hold function

1 : With the sample and hold function

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

TRG0

(b4 - b3)

(b7)

TRG1

External Trigger

Request Cause

Select Bit

Analog Input Port

Select Bit

0 0 : AN150 to AN157(2)

0 1 : Do not set to this value

1 0 : AN00 to AN07(3)

1 1 : AN20 to AN27(3)

b2 b1

0 0 : Selects ADTRG

0 1 : Selects a timer B2 interrupt

request of the three-phase motor

control timer functions (after the

ICTB2 counter completes

counting)

1 0 : Selects the Intelligent I/O group 3

channel 1 interrupt

1 1 : Do not set to this value

NOTES:

1. When the AD1CON2 register is rewritten during the A/D conversion, the conversion result is

indeterminate.

2. AN150 to AN157 are provided in the 144-pin package.

3. AN00 to AN07, AN20 to AN27 are available in single-chip mode only.

Figure 17.7 AD1CON2 Register, AD10 to AD17 Register

Function

A/D1 Register j (j=0 to 7)

Symbol

Address

After Reset

AD10 to AD12

01C116 - 01C016, 01C316 - 01C216, 01C516 - 01C416

Indeterminate

AD13 to AD15

01C716 - 01C616, 01C916 - 01C816, 01CB16 - 01CA16 Indeterminate

AD16 to AD17

01CD16 - 01CC16, 01CF16 - 01CE16

Indeterminate

8 low-order bits in an A/D conversion result

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

In 10-bit mode

In 8-bit mode

: 2 high-order bits in an A/D conversion result

: When read, its content is indeterminate.

b15

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