HD6412321 datasheet(74/1302 Pages) RENESAS

Part #	HD6412321

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series

PDF	1302 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 2 CPU

Rev.6.00 Sep. 27, 2007 Page 44 of 1268

REJ09B0220-0600

Operations can be performed on the CCR bits by the LDC, STC, ANDC, ORC, and XORC

instructions. The N, Z, V, and C flags are used as branching conditions for conditional branch

(Bcc) instructions.

2.4.4

Initial Register Values

Reset exception handling loads the CPU's program counter (PC) from the vector table, clears the

trace bit in EXR to 0, and sets the interrupt mask bits in CCR and EXR to 1. The other CCR bits

and the general registers are not initialized. In particular, the stack pointer (ER7) is not initialized.

The stack pointer should therefore be initialized by an MOV.L instruction executed immediately

after a reset.

2.5

Data Formats

The CPU can process 1-bit, 4-bit (BCD), 8-bit (byte), 16-bit (word), and 32-bit (longword) data.

Bit-manipulation instructions operate on 1-bit data by accessing bit n (n = 0, 1, 2, …, 7) of byte

operand data. The DAA and DAS decimal-adjust instructions treat byte data as two digits of 4-bit

BCD data.

HD6412321 Datasheet(PDF) 74 Page - Renesas Technology Corp