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ADS8517 Datasheet(PDF) 27 Page - Texas Instruments |
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ADS8517 Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 34 page ![]() LAYOUT POWER POWER-ON SEQUENCE GROUNDING SIGNAL CONDITIONING INTERMEDIATE LATCHES ADS8517 www.ti.com.......................................................................................................................................................................................... SLAS527 – SEPTEMBER 2008 For host processors that are able to advantage of a lower interface supply voltage, the ADS8517 offers a wide range of voltages—from 5.5V to as low as 1.65V. The ADS8517 should be considered as an analog component because, as noted in the Electrical Characteristics, it uses 95% of its power for the analog circuitry. If the interface is at the same +5V as the analog supply, the two +5-V supplies should be separate. Connecting VDIG (pin 28) directly to a digital supply can reduce converter performance because of switching noise from the digital logic. For best performance, the +5-V supply should be produced from whichever analog supply is present for the rest of the analog signal conditioning. If a +12-V or +15-V suppy is present in the system, a simple +5-V regulator can be used. Although it is not suggested, if the digital supply in the system must be used to power the converter, be sure it is properly filtered. Care must be taken with power sequencing when the interface and analog supplies are different. Refer to the Absolute Maximum Ratings for details. The analog supply should be powered on before the digital supply (used for the interface). It is important that the voltage difference between VDIG and the digital inputs does not exceed the limit of –0.3V to VDIG + 0.3V. All digital inputs should be kept inactive (logic low) until the digital (interface) supply is steady. Three ground pins are present on the ADS8517. DGND is the digital supply ground. AGND2 is the analog supply ground. AGND1 is the ground to which all analog signals internal to the A/D converter are referenced. AGND1 is more susceptible to current induced voltage drops and must have the path of least resistance back to the power supply. To achieve optimum performance, all the ground pins of the A/D converter should be tied to an analog ground plane, separated from the system digital logic ground. Both analog and digital ground planes should be tied to the system ground as near to the power supplies as possible. This configuration helps to prevent dynamic digital ground currents from modulating the analog ground through a common impedance to power ground. The ADS8517 features high-impedance inputs as the result of the resistive input attenuation circuit. For ±10V, 0V to 5V, and 0V to 4V inputs, the equivalent input impedances are 45.7k Ω, 20kΩ and 21.4kΩ respectively. Lower cost op amps may be used to drive the ADC inputs because the driving requirement is not as high compared to other converters. This input circuit not only reduces the power consumption on the signal conditioning op amp, but it also works as a buffer to attenuate any charge injection resulting from the operation of the CDAC FET sample switches, even though the design of those FET switches is optimized to give minimal charge injection. Another benefit provided by the ADS8517 high-impedance front-end is assured ±25V overvoltage protection. In most cases, this internal protection eliminates the need for external input protection circuitry. The ADS8517 does have 3-state outputs for the parallel port, but intermediate latches should be used if the bus is active during conversion. If the bus is not active during conversion, the 3-state outputs can be used to isolate the A/D converter from other peripherals on the same bus. Intermediate latches are beneficial on any monolithic A/D converter. The ADS8517 has an internal LSB size of 38 µV (with a 2.5-V internal reference). Transients from fast-switching signals on the parallel port, even when the A/D converter is 3-stated, can be coupled through the substrate to the analog circuitry, causing degradation of converter performance. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 27 Product Folder Link(s): ADS8517 |
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