 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AFE5805 Datasheet(PDF) 3 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
AFE5805 Datasheet(HTML) 3 Page - Texas Instruments |
|
|
3 / 51 page  ELECTRICAL CHARACTERISTICS AFE5805 www.ti.com................................................................................................................................................. SBOS421C – MARCH 2008 – REVISED OCTOBER 2008 AVDD_5V = 5.0V, AVDD1 = AVDD2 = DVDD = 3.3V, LVDD = 1.8V, single-ended input into LNA, ac-coupled (1.0 µF), VCNTL = 1.0V, fIN = 5MHz, Clock = 40MSPS, 50% duty cycle, internal reference mode, ISET = 56kΩ, LVDS buffer setting = 3.5mA, at ambient temperature TA = +25°C, unless otherwise noted. AFE5805 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PREAMPLIFIER (LNA) Gain A SE-input to differential output 20 dB Input voltage VIN Linear operation (HD2 ≤ –40dB) 250 mVPP blank Maximum input voltage Limited by internal diodes 600 mVPP Input voltage noise (TGC) en (RTI) RS = 0Ω, f = 1MHz 0.75 nV/ √Hz Input current noise in (RTI) 3 pA/ √Hz Common-mode voltage, input VCMI Internally generated 2.4 V Bandwidth BW Small-signal, –3dB 70 MHz Input resistance(1) At f = 4MHz 8 k Ω Input capacitance(1) Includes internal ESD and clamping diodes 16 pF FULL-SIGNAL CHANNEL (LNA+VCA+LPF+ADC) Input voltage noise (TGC) en RS = 0Ω, f = 2MHz, PGA = 30dB 0.85 nV/ √Hz RS = 0Ω, f = 2MHz, PGA = 20dB 1.08 nV/ √Hz Noise figure NF RS = 200Ω, f = 5MHz 1.5 dB Low-pass flter bandwidth LPF at –3dB, selectable through SPI 10, 15 MHz Bandwidth tolerance ±10 % High-pass filter HPF (First-order, due to internal ac-coupling) 200 kHz Group delay variation ±3 ns Overload recovery ≤ 6dB overload to within 1% 2 Clock Cycles ACCURACY Gain (PGA) Selectable through SPI 20, 25, 27, 30 dB Total gain, max(2) LNA + PGA gain, VCNTL = 1.2V 48 49.5 51 dB Gain range VCNTL = 0V to 1.2V 46 dB VCNTL = 0.1V to 1.0V 40 dB Gain error, absolute(3) 0V < VCNTL < 0.1V ±0.5 dB 0.1V < VCNTL < 1.0V –1.5 ±0.5 +1.5 dB 1.0V < VCNTL < 1.2V ±0.5 dB Gain matching Channel-to-channel –0.5 ±0.25 +0.5 dB Offset error VCNTL = 1.0V, PGA = 30dB –39 +39 LSB Offset error drift (tempco) ±5 ppm/°C Clamp level CL = 0 1.7 VPP CL = 1 (clamp disabled) 2.8 VPP GAIN CONTROL (VCA) Input voltage range VCNTL Gain range = 46dB 0 to 1.2 V Gain slope VCNTL = 0.1V to 1.0V 44.4 dB/V Input resistance 25 k Ω Response time VCNTL = 0V to 1.2V step; to 90% signal 0.5 µs DYNAMIC PERFORMANCE Signal-to-noise ratio SNR fIN = 2MHz; –1dBFS, PGA = 30dB 59.8 dBFS fIN = 5MHz; –1dBFS, PGA = 30dB 59.6 dBFS fIN = 10MHz; –1dBFS, PGA = 30dB 58.8 dBFS (1) See Figure 33. (2) Excludes digital gain within ADC. (3) Excludes error of internal reference. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): AFE5805 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
