HD64F3664FP datasheet(14/444 Pages) RENESAS

14 / 444 page

Rev. 6.00 Mar. 24, 2006 Page xiv of xxviii

Section 13 Watchdog Timer.............................................................................. 191

13.1

Features............................................................................................................................. 191

13.2

Register Descriptions........................................................................................................ 191

13.2.1

Timer Control/Status Register WD (TCSRWD) .............................................. 192

13.2.2

Timer Counter WD (TCWD)............................................................................ 193

13.2.3

Timer Mode Register WD (TMWD) ................................................................ 194

13.3

Operation .......................................................................................................................... 195

Section 14 Serial Communication Interface 3 (SCI3)....................................... 197

14.1

Features............................................................................................................................. 197

14.2

Input/Output Pins.............................................................................................................. 198

14.3

Register Descriptions........................................................................................................ 199

14.3.1

Receive Shift Register (RSR) ........................................................................... 199

14.3.2

Receive Data Register (RDR)........................................................................... 199

14.3.3

Transmit Shift Register (TSR) .......................................................................... 199

14.3.4

Transmit Data Register (TDR).......................................................................... 200

14.3.5

Serial Mode Register (SMR) ............................................................................ 200

14.3.6

Serial Control Register 3 (SCR3) ..................................................................... 201

14.3.7

Serial Status Register (SSR) ............................................................................. 203

14.3.8

Bit Rate Register (BRR) ................................................................................... 205

14.4

Operation in Asynchronous Mode .................................................................................... 210

14.4.1

Clock................................................................................................................. 210

14.4.2

SCI3 Initialization............................................................................................. 211

14.4.3

Data Transmission ............................................................................................ 212

14.4.4

Serial Data Reception ....................................................................................... 214

14.5

Operation in Clocked Synchronous Mode ........................................................................ 218

14.5.1

Clock................................................................................................................. 218

14.5.2

SCI3 Initialization............................................................................................. 218

14.5.3

Serial Data Transmission .................................................................................. 219

14.5.4

Serial Data Reception (Clocked Synchronous Mode) ...................................... 221

14.5.5

Simultaneous Serial Data Transmission and Reception.................................... 223

14.6

Multiprocessor Communication Function ........................................................................ 224

14.6.1

Multiprocessor Serial Data Transmission ......................................................... 226

14.6.2

Multiprocessor Serial Data Reception .............................................................. 227

14.7

Interrupts........................................................................................................................... 230

14.8

Usage Notes ...................................................................................................................... 230

14.8.1

Break Detection and Processing ....................................................................... 230

14.8.2

Mark State and Break Sending ......................................................................... 231

14.8.3

Receive Error Flags and Transmit Operations

(Clocked Synchronous Mode Only) ................................................................. 231

HD64F3664FP Datasheet(PDF) 14 Page - Renesas Technology Corp

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