H83068F datasheet(19/935 Pages) RENESAS

19 / 935 page

Rev. 3.00 Sep 14, 2005 page xix of xxii

18.10.2 Notes on Use of PROM Mode ............................................................................. 642

18.11 Flash Memory Programming and Erasing Precautions..................................................... 643

Section 19 Clock Pulse Generator .................................................................................. 649

19.1

Overview........................................................................................................................... 649

19.1.1 Block Diagram..................................................................................................... 650

19.2

Oscillator Circuit............................................................................................................... 651

19.2.1 Connecting a Crystal Resonator........................................................................... 651

19.2.2 External Clock Input............................................................................................ 653

19.3

Duty Adjustment Circuit................................................................................................... 655

19.4

Prescalers .......................................................................................................................... 655

19.5

Frequency Divider ............................................................................................................ 656

19.5.1 Register Configuration......................................................................................... 656

19.5.2 Division Control Register (DIVCR) .................................................................... 656

19.5.3 Usage Notes ......................................................................................................... 657

Section 20 Power-Down State ......................................................................................... 659

20.1

Overview........................................................................................................................... 659

20.2

Register Configuration...................................................................................................... 661

20.2.1 System Control Register (SYSCR) ...................................................................... 661

20.2.2 Module Standby Control Register H (MSTCRH)................................................ 663

20.2.3 Module Standby Control Register L (MSTCRL)................................................. 664

20.3

Sleep Mode ....................................................................................................................... 667

20.3.1 Transition to Sleep Mode..................................................................................... 667

20.3.2 Exit from Sleep Mode.......................................................................................... 667

20.4

Software Standby Mode.................................................................................................... 668

20.4.1 Transition to Software Standby Mode ................................................................. 668

20.4.2 Exit from Software Standby Mode ...................................................................... 668

20.4.3 Selection of Waiting Time for Exit from Software Standby Mode ..................... 669

20.4.4 Sample Application of Software Standby Mode.................................................. 670

20.4.5 Note ..................................................................................................................... 670

20.5

Hardware Standby Mode .................................................................................................. 671

20.5.1 Transition to Hardware Standby Mode................................................................ 671

20.5.2 Exit from Hardware Standby Mode ..................................................................... 671

20.5.3 Timing for Hardware Standby Mode ................................................................... 671

20.6

Module Standby Function................................................................................................. 673

20.6.1 Module Standby Timing ...................................................................................... 673

20.6.2 Read/Write in Module Standby ........................................................................... 673

20.6.3 Usage Notes ......................................................................................................... 673

20.7

System Clock Output Disabling Function......................................................................... 674

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