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R8C11 Datasheet(PDF) 38 Page - Renesas Technology Corp |
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R8C11 Datasheet(HTML) 38 Page - Renesas Technology Corp |
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38 / 227 page ![]() R8C/11 Group Rev.1.20 Jan 27, 2006 page 27 of 204 REJ09B0062-0120 Figure 5.13 Operation Detection Interrupt Generation Block Voltage detection interrupt generation circuit Oscillation stop detection interrupt signal Watchdog timer block This bit is set to “0”(not detected) by writing a “0” in a program. D43 D41 CM10 D40 VC27 VCC1 Internal reference voltage + - (Canceller width: 200 ns) VC13 Voltage detection signal is “H” when VC27 bit= 0 (disabled) Noise rejection circuit Digital filter fRING-S D42 DF1 to DF0 1/2 =002 =012 =102 =112 1/2 1/2 Noise canceller Voltage detection signal Watchdog timer underflow signal D42 bit is set to “0”(not detected) by writing a “0” in a program. When VC27 bit is set to “0” (voltage detection circuit disabled), D42 bit is set to “0” . Voltage detection circuit Voltage detection interrupt signal Watchdog timer interrupt signal Non-maskable interrupt signal D46 Hardware reset 2 D40, D41, D42, D43, DF0, DF1, D46, D47: Bits in D4INT register CM02: Bit in CM0 register VC13: Bit in VCR1 register CM10: Bit in CM1 register VC27: Bit in VCR2 register D47 Figure 5.14 Voltage Detection Interrupt Generation Circuit Operation Example Output of digital filter(2) D42 bit D42: Bit in D4INT register VC13: Bit in VCR1 register Voltage detection interrupt signal No voltage detection interrupt signals are generated when D42 bit is “H”. sampling Set D42 bit to “0” in a program (not detected) VC13 bit VCC sampling sampling sampling Set D42 bit to “0” in a program (not detected) NOTES: 1. D40 is “1”(voltage detection interrupt enabled). 2. Output of the digital filter shown in Figure 5.11 5.4 Voltage Detection Circuit |
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