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7540 Datasheet(PDF) 295 Page - Renesas Technology Corp

Part # 7540
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
PDF  366 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540 Datasheet(HTML) 295 Page - Renesas Technology Corp

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3-73
REJ09B0018-0200Z
Rev.2.00
Jun 21, 2004
7540 Group
APPENDIX
3.3 Notes on use
3.3 Notes on use
3.3.1 Notes on input and output ports
Notes on using input and output ports are described below.
(1) Notes in stand-by state
In stand-by state*1 for low-power dissipation, do not make input levels of an input port and an I/O
port “undefined”.
Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a
resistor.
When determining a resistance value, note the following points:
• External circuit
• Variation of output levels during the ordinary operation
When using a built-in pull-up resistor, note on varied current values:
• When setting as an input port : Fix its input level
• When setting as an output port : Prevent current from flowing out to external.
q Reason
The output transistor becomes the OFF state, which causes the ports to be the high-impedance
state. Note that the level becomes “undefined” depending on external circuits.
Accordingly, the potential which is input to the input buffer in a microcomputer is unstable in the
state that input levels of a input port and an I/O port are “undefined”. This may cause power
source current.
*1 stand-by state : the stop mode by executing the STP instruction
the wait mode by executing the WIT instruction
(2) Modifying output data with bit managing instruction
When the port latch of an I/O port is modified with the bit managing instruction*2, the value of the
unspecified bit may be changed.
q Reason
The bit managing instructions are read-modify-write form instructions for reading and writing data
by a byte unit. Accordingly, when these instructions are executed on a bit of the port latch of an
I/O port, the following is executed to all bits of the port latch.
• As for a bit which is set for an input port :
The pin state is read in the CPU, and is written to this bit after bit managing.
• As for a bit which is set for an output port :
The bit value of the port latch is read in the CPU, and is written to this bit after bit managing.
Note the following :
• Even when a port which is set as an output port is changed for an input port, its port latch holds
the output data.
• As for a bit of the port latch which is set for an input port, its value may be changed even when
not specified with a bit managing instruction in case where the pin state differs from its port latch
contents.
*2 bit managing instructions : SEB, and CLB instructions
(3) Usage for the 32-pin version
➀ Fix the P35, P36 pull-up control bit of the pull-up control register to “1”.
➁ Keep the P36/INT1 input level selection bit of the port P1P3 control register “0” (initial state).



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